Indian Institute of Technology (IIT)
Bhubaneswar, Odisha
Ph.D. Admission Notice under the Visvesvaraya Ph.D. Scheme, 2026
Ph.D. Admission Notice under the Visvesvaraya Ph.D. Scheme
Specifically for the Chip to Startup (C2S) Programme
Research Areas: Programmable Hardware Accelerators and Coarse-Grained Reconfigurable Architectures; System-on-Chip Design; Low Power VLSI ASIC Design; High Level Synthesis and CAD for VLSI; Digital VLSI Architectural Design of ICs and FPGA Architectures; VLSI Architectures for Digital Signal Processing; VLSI Architectures for Computer Arithmetic; VLSI Architectures for Fault-Tolerant and Fault-Testable Hardware Design; Circuit Design for High-Speed Serial Links (Full-Duplex, 4-PAM Signalling, CTLE and DFE Design, Equalizer Adaptation); Signalling Across Silicon Interposer and MCM; On-Chip DC-DC Converters; Phase-Locked Loop; ADC Design for High-Speed Serial Links; CMOS Circuit Design for Silicon Photonics; IC Design for Neuromorphic Intelligence and Wireless Communications; New Radio System Architectures for Next-Generation Wireless Standards and RF/Wireless System-on-Chip (SoC) Design.
For faculty-specific research areas, please visit: https://secs.iitbbs.ac.in/index.php/faculty-members .
Eligibility Criteria:
| Application window opens | 18 September, 2026 (Friday) |
| Application deadline | 30 September, 2026 (Wednesday) |
| Tentative interview schedule | During 5 October, 2026 - 12 October, 2026 |
| Selected candidate announcement | 14 October, 2026 |
Submit your application at: https://eims.iitbbs.ac.in/Admission/index?admiss_ch=54
Contact:
+91 80 2293 2228