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Jadavpur University - Admission to Short Term Certified Internship Cum Winter Training Programme On Microelectronics Technology & VLSI Design 2024

IC Design & Fabrication Centre
Department of Electronics & Telecommunication Engineering
Admission to Short Term Certified Internship Cum Winter Training Programme On Microelectronics Technology & VLSI Design 2024

6 weeks, Course starts from 2nd January, 2024
10:30 A.M. to 05:00 P.M., Monday to Friday

    + Programme

    Fabrication and Characterization of semiconductor devices
    • Mask Fabrication.
    • Hardware fabrication for all process of Microelectronics: cleaning, etching, oxidation, diffusion, photolithography and Metallization.
    • Characterization of fabricated device.
    FPGA based prototyping of Digital circuits
    • Overview of CMOS logic gates
    • Architectural design of digital circuits and logic synthesis
    • FPGA-based prototyping
    Nano-sensors: Technology and Application
    • Smart nanomaterial for sensing applications
    • Nano-sensor fabrication technologies
    • Sensors with IoT
    VLSI verification Process
    • Verification methodology and Verification process
    • Reusable TB, Verification environment architecture
    • Random coverage driven verification methodology
    VLSI EDA tool handling
    • Introduction to EDA Tools
    • Netlist Using SPICE and layout design
    • Programming using Verilog/VHDL
    • Verification of design using waveform editor
    Analog MOS circuit
    • Single stage MOS amplifier
    • Active loads, Current source, current sink, current mirror
    • Single stage CMOS OpAmp
    Nanomaterial and Graphene
    • Understanding of synthesis and characterization
    • Confinement effect
    • Application of nonmaterial
    • Graphene synthesis characterization and application

    + Eligibility

    The Candidate should be at least B.E./B.Tech 2nd Year and above in ECE / IEE / Electrical / CSE / IT / M.Sc. Electronics Science or equivalent.

    + Admission

    Application form will be issued from the IC Centre, Department of Electronics & Telecommunication Engineering, 3rd Floor, Jadavpur University, Kolkata or download from our website [ or]. Filled in application form shall be received at IC Centre during Monday to Friday, 11:00 A.M. to 05:00 P.M.

    + Course Fee

    Rupees 7,000/- (20% discount for JU students) + 18% GST in demand draft should be drawn in favour of "REGISTRAR, JADAVPUR UNIVERSITY", in any Nationalized branches of payable at Kolkata. Once deposited the course fee cannot be refunded. Hostel accommodation cannot be provided.

    + Enclosure

    One copy of PP Size Photograph, Xerox copy of Madhyamik Admit Card / Birth Certificate, HS Mark sheet, Semesters Mark sheet [Attested / Self Attested copies of Mark sheets / Certificates to be enclosed].

Examination Results 2024
Examination Schedule 2024
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